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| 1/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver ld71d1048c 10 bit pwm controller / 48 channel output led driver 2005. 1 data sheet
2/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver the ld71d1048c is led driver / controller ic for led display panel. this is consisted of 48 channel led driver , 10bit pwm controller and 48 bit shift register. also it is very convenient to application because all display data can be transferred by serial method. features ? driver output circuits - 48 column driver outputs : n-ch open drain mos transistor output - 16 row driver outputs : cmos output - led driving voltage : max. 5v (when transistor off) - led driving current : max. 60ma - led driving current control - outputs are 10bit pwm controlled - rout monitoring - rout external selectable - a little change of output current ? data interface - 48bit shift register for 10bit data input - 10bit parallel data format selectable ? display data memory - 7,680 bit sram ? pwm controller - 10bit pwm control ( 1024 gray scale ) - 3bit brightness control - pwm pulse width control ? on chip opamp for led driving current control ? low power consumption ? package type - 128 pin hmqfp( heat sink package) continuous power dissipation = 2w - 128 pin mqfp continuous power dissipation = 0.5w out-gnd voltage a little change of channel iout (ma) > 0.7v + 4% 5ma ~30ma > 1.0v 5ma ~60ma description . 2 ' 1 3/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver 10 x 48 shift register led 10bit led 10bit 10bit data register (1) 10bit data register (2) 10bit data register (3) 10bit data register (46) 10bit data register (47) 10bit data register (48) 10 10 10 10 10 10 din9 din0 dout9 dout0 sckin osc1 stinb driver output control oeb_r scken stenb resetb 10 10 10 10 10 10 10 10 10 10 10 10 sram 16 x 48 x 10 bits rout16 rout1 osc2 addr0 addr3 constant current control icntr icntg icntb row driver brd0 brd1 brd2 p8_16 rad0 rad3 rin_out oeb_g oeb_b rout moniter stout sckout block diagram pwm clock generator 1 8 . ( f o f s b u p s (1) 1 8 . ( f o f s b u p s (2) 1 8 . ( f o f s b u p s (3) 1 8 . ( f o f s b u p s (46) 1 8 . ( f o f s b u p s (47) 1 8 . ( f o f s b u p s (48) cout1 cout2 cout3 cout46 cout48 * * * * * * 3 ( # 4/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver ld71d1048c (14 x 20) ldt inc. 1 38 39 64 65 102 rout15 rout16 cout37 cout38 cout39 cout40 cout41 cout42 gnd gnd 103 128 cout43 cout44 cout48 gnd icntr icntg icntb stinb sckin din9 din8 brd2 gnd cout23 cout22 cout21 cout20 cout19 cout18 gnd cout17 cout16 cout15 cout14 cout13 gnd osc1 gnd vdd rout1 rout2 rout3 rout4 rout5 brd0 cout24 brd1 p8_16 rout11 rout10 rout9 gnd gnd cout30 cout29 gnd cout28 cout27 cout26 cout25 gnd rout8 rout7 rout6 rad<3> rad<2> rad<1> addr0 stenb scken resetb stout rout12 rout13 rad<0> rin_out cout32 cout31 cout34 cout33 cout36 cout35 addr2 addr1 addr3 cout45 cout46 cout47 vdd din4 din3 din2 din1 gnd cout1 cout2 cout3 cout4 cout5 cout6 cout7 cout8 cout9 cout10 cout11 cout12 dout0 dout2 dout1 dout4 dout3 sckout din0 din6 din5 dout5 dout6 gnd din7 gnd dout7 oebb oebr dout9 osc2 dout8 oebg rout14 pin connections(mqfp) 5/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver pin name description vdd 5v power supply terminal. gnd gnd terminals for led drivers and control logic. all gnd terminals must be connected to gnd level. do not leave any gnd terminal to nc. din0 ~ din9 data input terminals for 10bit r, g, b data. shift register accepts r, g, b data from these terminals. (at rising edge of sckin) dout0 ~ dout9 output terminals of shift register output data for next din9 ~ din0 terminals. resetb reset input terminal (low active). this pin reset all register except ram area. sckin shift register clock input terminal. stinb strobe signal input terminal. at falling edge of strobe signal, 48 channels of 10 bit data registers copy r, g, b data from shift register. stenb stinb enable signal input terminal (low active). scken sckin enable signal input terminal (high active). oeb_r oeb_g oeb_b output enable signal input terminal. the device outputs data when o eb = ?l?. when oeb = ?h? all r, g, b output terminals hold high-impedance state. oeb_r, oeb_g, oeb_b work indepantant respectively. r pin : cout1,4,7,10,13,16,19 ,22,25,28,31, 34,37,40,43,46 g pin : cout2,5,8,11,14,17,20 ,23,26,29,32, 35,38,41,44,47 b pin : cout3,6,9,12,15,18,21 ,24,27,30,33, 36,39,42,45,48 osc2 pwm generator reference clock output terminal. pin no. (mqfp) 56, 121 8,7, 6, 5, 4, 3, 2,1 128,127 25,26,27,28 29,30,31,32, 33,34 99 126 125 97 98 35, 36, 37 38 osc1 pwm generator reference clock input terminal. 39 sckout shift register clock out terminal. 24 stout strobe signal output terminal. 100 pin description 6/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver addr0 ~ 3 sram address inctr inctg inctb r,g,b current control pin. it is connected gnd with resistor r pin : cout1,4,7,10,13,16,19 ,22,25,28,31, 34,37,40,43,46 g pin : cout2,5,8,11,14,17,20 ,23,26,29,32, 35,38,41,44,47 b pin : cout3,6,9,12,15,18,21 ,24,27,30,33, 36,39,42,45,48 cout1 ~ 48 led driver output terminals. 93,94,95,96 122,123,124 pin name description pin no. (mqfp) 9,10,12,13, 14,15,17,18, 19,20,22,23, 41,42,44,45, 46,47,49,50, 51,52,54,55, 74,75,77,78, 79,80,82,83, 84,85,87,88, 106,107,109,110, 111,112,114,115, 116,117,119,120 p8_16 p8_16=0, rout1 ~ rout8 enable, p8_16 = 1, rout1~rout16 enable when rin_out = ?l? 92 rout1 ~ 16 row driver control output signal 57,58,59,60 61,70,71,72 89,90,91,101 102,103,104,105 rad0 ~ rad3 rout active selection pins 66,67,68,69 rin_out external or internal rout control selection. rin_out = ?l? rout is doing internal rin_out = ? h? rout is dependent on rad0~3 65 brd0 ~ brd2 brightness control input selection terminal. 62,63,64 pin description (continued) 7/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver parameter symbol unit absolute maximum ratings (ta = 25 o c) rating supply voltage v dd v 0 ~ 7.0 output voltage (r, g, b) v out v -0.5 ~ 5 output current (r, g, b) i out ma 80 input voltage v in v -0.4 ~ v dd + 0.4 gnd terminal current i gnd ma 1440 clock frequency f osc mhz 10 power dissipation p d w 1.78 operating temperature t opr o c -40 ~85 osc f sckmax mhz 10 sckin storage temperature t stg o c -55 ~ 150 parameter symbol unit recommended operating condition (ta = 25 o c) condition supply voltage v dd v - output voltage (cout1~48) v out v - output current i out ma - input voltage v in v - clock frequency f osc mhz - power dissipation(hmqfp) p dh w - osc min. 4.5 - - 0 - - typ. 5.0 - - - - 2 max. 5.5 5.5 60 v dd 10 cout1~ 48 dout, sckout, stout i oh - - - -1.0 i ol - - - 1.0 din data setup time t setup (d) ns - 40 - - din data hold time t hold (d) ns - 60 - - stinb setup time t stb setup ns - 60 - - stinb hold time t stb hold ns - 100 - - f sr mhz - sckin - - 10 pulse width sckin, osc1 tw h ns - 50 - - tw l ns - 50 - - stinb width time t wsl ns - 100 - - electrical characteristics - - - -1.5 - - - 1.5 i oh i ol rout1~16 power dissipation(mqfp) p dn w - - 0.5 8/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver timing wave form parameter symbol test condition unit input voltage v ih v typ. - min. 0.7v dd - test cir- cuit - ?h? level v il - gnd - - ?l? level output voltage v ol v - - - - dout v oh - 0.8v dd - - i oz - v oh = 6.0v - ua output leakage current output current1 i ol1 ma 37.0 34 r ext = 8 ? - delta iout i ol1 + 1.5 - r ext = 16 ? i out = 40ma, v out = 1v - % output current2 i ol2 ma 69.0 65.0 r ext = 4.0 ? - delta iout i ol2 + 1.5 - r ext = 4.0 ? i out = 69ma, v out = 1v - % %/v dd 1.5 - r ext = 16 kw - %/v supply voltage regulation v ref 1.26 - r ext =4 ? ta =-40~85 o c - v reference voltage r in (up) 200 100 - - ? pull up resistor r in (down) 200 100 - - pull down resistor irext(1) - - r ext = open, outn = off - u supply current irext(2) 74.0 70 r ext = 16 ? outn = off - ua irext(3) 140.0 130 r ext = 8 ? outn = off - max. v dd 0.3v dd 0.2v dd - 1 40.0 + 6.0 74 + 6.0 5.0 - 400 400 - 78 150 electrical characteristics (ta = 25 o c unless otherwise noted) (continued) rext iout 6 kohm 46ma 8 kohm 35ma 10 kohm 29ma 15 kohm 20ma 30 kohm 10ma 4 kohm 64ma 4k 6k 8k 10k 15 k 30k 100 90 80 70 60 50 40 30 20 10 0 r ext -i out i out (ma) r ext (ohm) cout = 2.0(v) electrical characteristics (ta = 25 o c unless otherwise noted) relation cout with rext 9/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver parameter symbol unit f sckmax data set up time t setup (d) data hold time t hold (d) ns mhz maximum sckin rising time t r condition max. typ. min. v dd = 5.0v v out = 0.4v v con = v dd v ih = v dd v il = gnd f pwm = 10mhz i out = 40ma - sckin-dout maximum clock frequency sckin minimum pulse width tw h tw l sckin osc1 stinb maximum sckin falling time cout output rising time cout output falling time t f t or t of us 5 - 10 - 10 - 50 - - 50 - - 100 - - 40 - 60 - - - 10 - - 10 40 50 120 - 10 - ns ns switching characteristics (ta = 25 o c) t p lh ns propagation delay time (?l to ?h?) sckin-sckout oeb-cout - 5 - 10 stinb-stout - 5 - 5 t p hl ns propagation delay time (?h to ?l?) sckin-sckout oeb-cout(*1) - 5 - 40 - stinb-stout - 5 oeb-cout(*2) - 50 - oeb-cout(*3) - 60 oeb-cout(*4) - 100 - oeb-cout(*5) - 120 - 50 lh hl 50 stinb set up time ns t stb setup 100 - lh 100 hl - strobe hold time ns t stb hold tw l 8 i f o 3 & 9 5 , 0 i n 8 i f o 3 & 9 5 , 0 i n 8 i f o 3 & 9 5 , 0 i n 8 i f o 3 & 9 5 , 0 i n 8 i f o 3 & 9 5 , 0 i n 10/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver timing wave form sckin-dout, outn t r t f h l h on l off clock data dout outn t phl t w t setup t hold t or t of t plh 90% 50% 10% 90% 50% 10% 90% 50% 10% 90% 50% 10% 50% 50% 50% h l sckin-stin h l h l h l sckin data 50% 50% t setup latch data ?h? of sckin stin 50% stout 50% h l sckout t hold t phl t plh 90% 10% 50% 50% h l on off oeb coutn oeb 11/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver package power dissipation 5 i f n b y j n v n b m m p x b c m f q b d l b h f q p x f s e j t t j q b u j p o j t e f u f s n j o f e b t 1 % n b y 5 k 5 b 3 u i k b 8 i f o p v u q v u d i b o o f m t b s f u v o f e p o t j n v m u b o f p v t m z u i f b d u v b m q b d l b h f e j t t j q b u j p o j t 1 % b d u * % % y 7 % % * p v u y 7 % 4 y 5 i f s f g p s f u p l f f q 1 % b d u 1 % n b y u i f b m m p x b c m f n b y j n v n p v u q v u d v s s f o u j t * 0 6 5 \ < 5 k 5 b 3 u i k b > * % % y 7 % % ^ 7 % 4 8 i f s f 5 k ? $ 2.0 1.5 1.0 0.5 0 -25 0 25 50 75 100 ambient temperature, ta ( ? ) ic mounted glass epoxy pcb power dissipation, pd (w) . b y 1 p x f s % j t t j q b u j p o b u 7 b s j p v t " n c j f o u 5 f n q f s b u v s f 12/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver load supply voltage (v led ) !? !? 7 - & % 7 % 3 0 1 7 g - % % $ 7 % 4 !? !? 7 - & % 7 % 3 0 1 7 g - % % $ 7 % 4 - % % $ b s f e j t j h o f e u p p q f s b u f x j u i 7 % 4 s b o h j o h g s p n 7 u p 7 d p o t j e f s j o h u i f q b d l b h f q p x f s e j t t j q b u j o h m j n j u t 7 % 4 n b z c f i j h i f s f o p v h i u p n b l f 1 % b d u 1 % n b y 8 i f o 7 - & % 7 b o e 7 % 4 ? 7 g j o x i j u d i 7 - & % j t u i f m p b e t v q q m z w p m u b h f * o u i j t d b t f j u j t s f d p n n f o e f e u p v t f u i f m p x f t u q p t t j c m f t v q q m z w p m u b h f p s u p t f u b o f y u f s o b m w p m u b h f s f e v d f s 7 % 3 0 1 " 7 p m u b h f s f e v d f m f u t 7 % 4 7 - & % 7 g 7 % 3 0 1 3 f t j t u f s t p s ; f o f s e j p e f d b o c f v t f e j o u i f b q q m j d b u j p o t b t u i f g p m m p x j o h g j h v s f t 13/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver system interface ? sckenenable input if scken is high, ld71d1048c receive sckin signal and din<9:0> ? stenb enables stinb. if stenb is low , ld71d1048c receive stinb and transfer shift regist er data to memory ? output enable input the ld71d1048c has 3 output enable pin (oeb_r, o eb_g, oeb_b). if the oeb = 1, output are off and if oeb = 0 then all output pins ar e pwm output. refer to timing diagram. ? data input / output the ld71d1048c has 10bit data input pins (din [9:0]) and 10bit data output pins (dout[9:0]). the output data is out after 48 times sckin from input data. if dout[9:0] pins are connected to next device din[9:0] pins, the first device 48bit input data can shift the next device 48bit input data by sckin. it can transfer display data to serial method so it makes dev ice to connect directly. the 10bit input data are inputt ed 10bit cout1 and next 10bit cout 2 and next 10bit cout3 ? cout48 input data by sckin. refer to timing diagram. ? pwm function the ld71d1048c has 10 bit pwm function. pwm 10 bit data is received by din[9:0] pins. it can control led driver brightness by 1024 gr ay scale. refer to column driver timing diagram. ? row control the ld71d1048c has 16 bit row control pins ( rout[16:1]). the signal of row controller is using for scanning. rin_out pin is ?l?, rout signals are generated by internal clock. if rin_out pin is ?h?, rout signals are generated by rad0 ~ rad3 and rout[16:1] signals are available . if rin_out pin is ?l? and p8_16 is ?l?, rout[8:1] signals are available. p8_16 is ?h?, rout[16:1] signals are available. refer to row driver timing diagram. ? sram function the ld71d1048c has 7,680 bits sram memory . the 7,680 bits sram store 10 bits pwm data of 16 row and 48 column. refer to timing diagram. ? rout monitor function this is display off function when rout signal are halted at 0.3 second if rout is not change during 0.3 sec. it is including watch dog timer in the ld71d1048c. ? rc oscillation the ld71d1048c is consisted of internal rc oscillation circuit. so oscillation frequency is changed by external resistor . the external re sistor is connected with osc1,osc2 pins. refer to rc oscillation diagram. functional description 14/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver cout2 cout1 cout48 cout47 cout46 din9~din0 sckin data input stinb data register data (internal) data register(1) sram1[9:0] sram2[9:0] dout timing diagram din n+4[9:0] din n+3[9:0] din n+2[9:0] din n+1[9:0] din n[9:0] din9~din0 sckin data input dout9~dout0 data output sckin sckout (after 48 clocks) 54 49 50 51 52 53 12345 data register(2) data register(47) data register(48) din n+4[9:0] din n+3[9:0] din n+2[9:0] din n+1[9:0] din n[9:0] 6 49 50 51 52 53 54 input timing diagram din n-1[9:0] functional description (continued) din n+4[9:0] sram47[9:0] sram48[9:0] 15/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver cout1 00 01 2e 2f 0 1 2 3 4 5 6 7 8 9 a b c d e f cout2 cout47 cout48 address cout3 02 03 cout4 2d cout46 addr0 ~ 3 000h 001h 002h 003h 02d 02e 02f 100h 101h 102h 103h 12d 12e 12f 200h 201h 202h 203h 22d 22e 22f 300h 301h 302h 303h 32d 32e 32f 400h 401h 402h 403h 42d 42e 42f 500h 501h 502h 503h 52d 52e 52f 600h 601h 602h 603h 62d 62e 62f 700h 701h 702h 703h 72d 72e 72f 800h 801h 802h 803h 82d 82e 82f 900h 901h 902h 903h 92d 92e 92f a00h a01h a02h a03h a2d a2e a2f b00h b01h b02h b03h b2d b2e b2f c00h c01h c02h c03h c2d c2e c2f d00h d01h d02h d03h d2d d2e d2f e00h e01h e02h e03h e2d e2e e2f f00h f01h f02h f03h f2d f2e f2f 48 address of sram the address 000h ~ 02fh are simultaneous writing data. sram map functional description (continued) 16/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver stinb data register data (internal) data register(1) sram1[9:0] sram2[9:0] sram3[9:0] sram48[9:0] sram47[9:0] sram46[9:0] data register(2) data register(3) data register(46) data register(47) data register(48) sram writing (internal) sram[000h] cout1[9:0] cout2[9:0] cout3[9:0] cout48[9:0] cout47[9:0] cout46[9:0] sram[001h] sram[002h] sram[02dh] sram[02eh] sram[02fh] addr[3:0] = 0000h sram write timing diagram functional description (continued) pwm counter 2 1 1023 1022 1020 3 17/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver rout1 rout2 rout7 rout8 sram[000h] ~ sram[02fh] row driver internal controlle d signal (p8/16 = 0, rin_out = 0) sram output sram[100h] ~ sram[12fh] sram[600h] ~ sram[62fh] sram[700h] ~ sram[72fh] t1 = 1 frame = scan x 8 = 1.6872ms frame freuquency = 592hz at osc1 = 10mhz 1/8frame row driver timing diagram(1) functional description (continued) rout mask 1 pw mask = 63 x osc1 pw = 1023 x osc1 pw 2 scan = mask + ( 2 x pw ) cout 18/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver rout rout2 rout15 rout16 sram[000h] ~ sram[02fh] row driver internal controlle d signal (p8/16 = 1, rin_out =0) sram output sram[100h] ~ sram[12fh] sram[e00h] ~ sram[e2fh] sram[f00h] ~ sram[f2fh] t1 = 1 frame = scan x 16 = 3.3744ms frame frequency = 296hz at osc1= 10mhz 1/16frame mask 1 pw mask = 63 x osc1 pw = 1023 x osc1 pw 2 scan = mask + ( 2 x pw ) cout row driver timing diagram(2) functional description (continued) rout1 19/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver rout1 rad=0000 rout2 rad=0001 rout15 rad=1110 rout16 rad=1111 sram[000h] ~ sram[02fh] row driver external cont rolled signal ( rin_out = 1) sram output sram[100h] ~ sram[12fh] sram[e00h] ~ sram[e2fh] sram[f00h] ~ sram[f2fh] row driver timing diagram(3) rad n+1 rad n rad n+15 rad n+14 3 " % scan = [ mask + ( pw x n ) ] x osc1 functional description (continued) rout mask 1 pw mask = 63 x osc1 pw = 1023 x osc1 pw n scan = mask + ( pw x n ) cout o rad<3:0> !?!?!? !?!?!? o 2 20/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver external row control timing o $ 0 6 5 o $ 0 6 5 o o 3 " % 0 4 $ 3 0 6 5 / 1 2 3 " % 4 i p v m e $ i b o h f b u 5 j n f y / y 0 4 $ $ - , 5 b d 3 x -1 x x +1 x + 62 x + 63 functional description (continued) 3 0 6 5 / 21/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver cout 1) sram data = (000)h data with pwm timing diagram cout 2) sram data = (0ff)h y 0 4 $ 0 / 0 ' ' 0 ' ' cout 3) sram data = (1ff)h y 0 4 $ 0 / 0 ' ' cout pw = 1023 x osc1 5) sram data = (3ff)h y 0 4 $ 0 / cout 4) sram data = (2ff)h y 0 4 $ 0 / 0 ' ' functional description (continued) 22/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver cout[48:1] brd[2]=1 pw = 1023 * osc1 scan = 63+ (2 x pw) column driver timing diagram brightness control(1) functional description (continued) 0 4 $ cout[48:1] brd[2]=0 pw = 1023 * osc1 scan = 63 + (2 x pw) 0 4 $ mask 1 pw pw 2 mask 1 pw pw # 3 % < > $ p o u s p m 1 8 . . b t l 5 j n f 8 i f o # 3 % < > u x p 1 8 p v u p v u c f d p n f p o 8 i f o # 3 % < > p o f p g u x p 1 8 p v u q v u c f d p n f p g g 0 / 0 / 0 ' ' 0 / 0 ' ' 0 ' ' 23/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver brd[1:0]=11 column driver timing diagram brightness control(2) functional description (continued) 4 f u u j o h $ v s s f o u y 4 f u u j o h $ v s s f o u y 4 f u u j o h $ v s s f o u y 4 f u u j o h $ v s s f o u y 5 j n f * d p v u brd[1:0]=10 brd[1:0]=01 brd[1:0]=00 # 3 % < > $ p o u s p m t * d p v u - f w f m # 3 % < > * d p v u 9 # 3 % < > * d p v u 9 > # 3 % < > * d p v u 9 # 3 % < > * d p v u 9 24/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver osc1 osc2 rf clock generation pwclk ld71d1048c rf = 0.0k osc1 = 10mhz +- 10% rf = 2k osc1 = 9mhz +- 10% rf = 3k osc1 = 7mhz +- 10% rf = 4k osc1 = 6mhz +- 10% rf = 5k osc1 = 5mhz +- 10% internal oscillation external oscillation osc1 osc2 clock generation pwclk ld71d1048c external clock rs rc oscillation functional description (continued) 25/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver 128 pin mqfp (14 x 20 body) -a- -b- (0.75(0.030)) 14.10(0.555) 13.90(0.547) 17.40(0.685) 17.00(0.669) index corner (12.50(0.492)) (0.75(0.030)) 0.27(0.011) 0.17(0.007) 20.10(0.791) 19.90(0.783) -d- (18.50(0.728)) 23.45(0.923) 22.95(0.904) 0.20(0.008) m c a ?b s d s 0.20(0.008) m c a ?b s d s 0.08(0.003) m c a ?b s d s 0.20(0.008) m h a ?b s d s 0.05(0.002) a ?b 0.20(0.008) m h a ?b s d s 0.05(0.002) d 0.50(0.020) (124x) 8 o ~12 o all sides -h- datum plane 0.102(0.004) -c - seating plane base plane 2.87(0.113) 2.57(0.101) 3.40(0.134) 2.96(0.117) 0.23(0.009) 0.13(0.005) after plane see detail ?a? -h- datum plane 0.25(0.010)min. gage plane 0.25(.010) % & 5 " * - ? " ? 1.03(0.041) 0.73(0.029) (1.60(0.063)) " 0 o min. 0 o ~7 o r0.13(0.005)min. r0.20(0.012) 0.13(0.005) 1 128 package information 26/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver data & control signal connection controller 10bit data power stinb sckin brd<2:0> oeb_b oeb_g oeb_r addr<3:0> rad<3:0> ce1b ce2 osc1 1024 gray scale 10 bit data next chip ld71d1048c din[9:0] dout[9:0] cout1 sckin icntr icntg icntb stinb cout2 cout3 cout46 cout47 cout48 rout1 rout2 rout7 rout8 osc1 osc2 ce2 ce1b p16/8 rad<3:0> addr<3:0> oeb_r oeb_g oeb_b brd<2:0> rin_out stout sckout reference applications $ b t f & y u f s o b m 3 0 6 5 $ i b o h f : p v d b o t f m f d u 3 0 6 5 q p s u x j u i 3 " % ' p s & b n q m f 3 " % 3 " % ( / % 3 0 6 _ 3 0 6 5 " d u j w f e c z 3 " % 10bit data 10bit data ld71d1048c din[9:0] dout[9:0] cout1 sckin icntr icntg icntnb stinb cout2 cout3 cout46 cout47 cout48 rout1 rout2 rout7 rout8 osc1 osc2 ce2 ce1b p16/8 rad<3:0> addr<3:0> oeb_r oeb_g oeb_b brd<2:0> rin_out stout sckout 7 % % 7 % % 7 % % 7 % % 27/26 ld71d1048c sd-2003a 10 bit pwm controller / 48 channel output led driver data & control signal connection controller 10bit data stinb sckin brd<2:0> oeb_b oeb_g oeb_r addr<3:0> rad<3:0> ce1b ce2 osc1 1024 gray scale 10 bit data ld71d1048c din[9:0] dout[9:0] cout1 sckin icntr icntg icntb stinb cout2 cout3 cout46 cout47 cout48 rout1 rout2 rout15 rout16 osc1 osc2 ce2 ce1b p16/8 rad<3:0> addr<3:0> oeb_r oeb_g oeb_b brd<2:0> rin_out stout sckout reference applications 2 $ b t f * o u f s b m 3 0 6 5 $ i b o h f 3 0 6 5 _ 3 0 6 5 $ 0 . 3 ( # 3 $ 0 . 3 ( # 3 $ 0 . 3 ( # 3 $ 0 . 3 ( # 3 $ 0 . 3 ( # 3 $ 0 . 3 ( # 3 $ 0 . 3 ( # 3 $ 0 . 3 ( # 3 3 0 6 5 3 0 6 5 cout43 cout44 cout4 cout5 cout7 cout45 7 % % ( / % $ b q |
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